Job Details:

Job Description:
As a Silicon Design – Flows and Methodology Intern, you will play an integral role in contributing to the development and documentation of tools, flows, and methodologies that drive silicon design innovation. You will assist in analyzing design efficiency and quality gaps, improving automation and scalability across projects. This hands-on position offers a dynamic environment where you’ll learn, apply knowledge, and build skills while supporting critical design initiatives.

Join a team dedicated to advancing Intel’s silicon IP design and enhance their innovative tools, flows, and methodologies. Our group delivers multiple memory related IPS and we strive for efficiency, scalability, and use of automation to drive excellence in IP development and align with Intel’s broader technological goals. As part of this collaborative organization, you will be immersed in an environment that values continuous learning and impactful contributions.
 
Responsibilities will include but are not limited to:

• Assist in developing and documenting silicon design tools, flows, and methodologies.
• Analyze design efficiency and identify quality gaps to drive improvements.
• Support automation and scalability efforts across multiple design projects.
• Collaborate with cross-functional teams to contribute to internal tool development and enablement.
• Participate in hands-on projects that align with Intel’s business goals, gaining exposure to real-world challenges and opportunities.

The ideal candidate should show the following behavioral traits:

• Strong problem-solving skills with an ability to identify and address design inefficiencies.
• Effective communication and collaboration skills within cross-functional teams.
• Willing to demonstrate disciplined execution in project work.
• Enthusiasm for continuous learning and process improvement.

Qualifications:
Minimum qualifications are required to be initially considered for this position.

• Currently pursuing a BS in Electrical Engineering, Computer Engineering, Computer Science, Embedded Systems Engineering or related technical field (at least 1 year remaining as an active student).

• 6+ months of hands-on experience in- Proficiency in Python and Unix.

• Foundational knowledge in Integrated Circuit Design Flow and Microarchitecture Fundamentals.

• Familiarity with RTL Design and System Verilog.

• Understanding of Tools, Flows, and Methodology (TFM) Development.

• Advanced English level

• Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship).

Requirements listed would be obtained through a combination of relevant industry
job experience, internship experience and/or schoolwork/classes/research

We are excited to welcome innovative thinkers and motivated learners eager to explore future career opportunities while making a tangible impact in a collaborative environment.

          

A candidate who accepts an offer of employment in Mexico is required to present their own personal identification information and numbers for the following: Mexican Security Number (NSS), Tax Identification Number (RFC) and CURP identification number.
Job Type:
Student / Intern

Shift:
Shift 1 (Mexico)

Primary Location:
Mexico, Guadalajara

Additional Locations:

Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Job Details:

Job Description:
As a Silicon Design – Flows and Methodology Intern, you will play an integral role in contributing to the development and documentation of tools, flows, and methodologies that drive silicon design innovation. You will assist in analyzing design efficiency and quality gaps, improving automation and scalability across projects. This hands-on position offers a dynamic environment where you’ll learn, apply knowledge, and build skills while supporting critical design initiatives.

Join a team dedicated to advancing Intel’s silicon IP design and enhance their innovative tools, flows, and methodologies. Our group delivers multiple memory related IPS and we strive for efficiency, scalability, and use of automation to drive excellence in IP development and align with Intel’s broader technological goals. As part of this collaborative organization, you will be immersed in an environment that values continuous learning and impactful contributions.
 
Responsibilities will include but are not limited to:

• Assist in developing and documenting silicon design tools, flows, and methodologies.
• Analyze design efficiency and identify quality gaps to drive improvements.
• Support automation and scalability efforts across multiple design projects.
• Collaborate with cross-functional teams to contribute to internal tool development and enablement.
• Participate in hands-on projects that align with Intel’s business goals, gaining exposure to real-world challenges and opportunities.

The ideal candidate should show the following behavioral traits:

• Strong problem-solving skills with an ability to identify and address design inefficiencies.
• Effective communication and collaboration skills within cross-functional teams.
• Willing to demonstrate disciplined execution in project work.
• Enthusiasm for continuous learning and process improvement.

Qualifications:
Minimum qualifications are required to be initially considered for this position.

• Currently pursuing a BS in Electrical Engineering, Computer Engineering, Computer Science, Embedded Systems Engineering or related technical field (at least 1 year remaining as an active student).

• 6+ months of hands-on experience in- Proficiency in Python and Unix.

• Foundational knowledge in Integrated Circuit Design Flow and Microarchitecture Fundamentals.

• Familiarity with RTL Design and System Verilog.

• Understanding of Tools, Flows, and Methodology (TFM) Development.

• Advanced English level

• Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship).

Requirements listed would be obtained through a combination of relevant industry
job experience, internship experience and/or schoolwork/classes/research

We are excited to welcome innovative thinkers and motivated learners eager to explore future career opportunities while making a tangible impact in a collaborative environment.

          

A candidate who accepts an offer of employment in Mexico is required to present their own personal identification information and numbers for the following: Mexican Security Number (NSS), Tax Identification Number (RFC) and CURP identification number.
Job Type:
Student / Intern

Shift:
Shift 1 (Mexico)

Primary Location:
Mexico, Guadalajara

Additional Locations:

Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.