Job Details:

Job Description:
Job Description:
This position is in the Logic Technology Development team working in one of the most advanced semiconductor cleanroom facilities in the world. You will be designing, executing, and analyzing experiments necessary to meet engineering specifications for their process.

What we offer:
We foster a collaborative, supportive, and exciting environment where the brightest minds in the world come together to achieve exceptional results. We give you opportunities to transform technology and create a better future, by delivering products that make the world a better place. Intel Corporation Core Values here.

Benefits:
We provide benefits that promote a healthy, enjoyable life: excellent medical plans, wellness programs, and amenities, time off, recreational activities, discounts on various products and services, and many more creative rewards that make Intel a Great Place to Work. Find more information about our Amazing Benefits here.

What we do:
The Logic Technology Development (LTD) organization delivers the latest process technology innovations to drive Intel’s amazing product roadmap. Look at Life Inside Intel here.

What you will be considered for:
LTD Advanced Device Development Engineers are responsible for leading scientific research enabling the manufacture of innovative device architectures, including but not limited to:

• Set advanced device performance targets for Process Design Kit releases and Interface with Design and Foundry partners to address circuit-level issues.
• Assess Silicon-to-Simulation health and readiness for High Volume Manufacturing.
• Define robust test structures and test programs to validate advanced design rules and reliably extract key device parameters.
• Use Statistics, Data Mining, and other data analysis techniques to collect, explore, and extract insights from Electrical-test, yield, and fab data to define future development direction.

Qualifications:
Qualifications:
You must possess the minimum qualifications below to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. The experience listed below would be obtained through a combination of your schoolwork/classes/ experimental research and/or relevant previous job and/or internship experiences.

Minimum Qualifications

• Must possess a master’s degree with 2-years’ industry experiences or Ph.D. degree in electrical engineering (EE), electrical and computer engineering (ECE), electrical engineering and computer science (EECS) directly related to Semiconductor field.
• Minimum of 6 months of experience in one or more of the following:
  Semiconductor materials, fabrication, and device physics.
  Electrical characterization of Semiconductor Devices (transistor, diode, etc.)

Preferred Qualifications

• Advanced Transistor Device Structures and Device Physics.
• Process monitoring Test structures design and layout experience.
• Device and circuit simulation.
• Statistical Process Control (SPC) or Design of Experiments (DOE) principles and engineering analysis tools.
• Expertise in database structures, research methods analytics packages (i.e., JMP, MATLAB, Octave), scripting languages (i.e., JSL, Perl, TCL), or programming languages (i.e., Python, SQL, C/C++)
  Expertise in agentic AI and orchestrated LLM workflows, machine learning, deep learning, Retrieval-Augmented Generation (RAG), knowledge engineering, and dataflow pipeline architectures.

Work model

• Onsite at Taipei Intel office, Taiwan

          

Job Type:
Experienced Hire

Shift:
Shift 1 (Taiwan)

Primary Location:
Taiwan, Taipei

Additional Locations:

Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Job Details:

Job Description:
Job Description:
This position is in the Logic Technology Development team working in one of the most advanced semiconductor cleanroom facilities in the world. You will be designing, executing, and analyzing experiments necessary to meet engineering specifications for their process.

What we offer:
We foster a collaborative, supportive, and exciting environment where the brightest minds in the world come together to achieve exceptional results. We give you opportunities to transform technology and create a better future, by delivering products that make the world a better place. Intel Corporation Core Values here.

Benefits:
We provide benefits that promote a healthy, enjoyable life: excellent medical plans, wellness programs, and amenities, time off, recreational activities, discounts on various products and services, and many more creative rewards that make Intel a Great Place to Work. Find more information about our Amazing Benefits here.

What we do:
The Logic Technology Development (LTD) organization delivers the latest process technology innovations to drive Intel’s amazing product roadmap. Look at Life Inside Intel here.

What you will be considered for:
LTD Advanced Device Development Engineers are responsible for leading scientific research enabling the manufacture of innovative device architectures, including but not limited to:

• Set advanced device performance targets for Process Design Kit releases and Interface with Design and Foundry partners to address circuit-level issues.
• Assess Silicon-to-Simulation health and readiness for High Volume Manufacturing.
• Define robust test structures and test programs to validate advanced design rules and reliably extract key device parameters.
• Use Statistics, Data Mining, and other data analysis techniques to collect, explore, and extract insights from Electrical-test, yield, and fab data to define future development direction.

Qualifications:
Qualifications:
You must possess the minimum qualifications below to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. The experience listed below would be obtained through a combination of your schoolwork/classes/ experimental research and/or relevant previous job and/or internship experiences.

Minimum Qualifications

• Must possess a master’s degree with 2-years’ industry experiences or Ph.D. degree in electrical engineering (EE), electrical and computer engineering (ECE), electrical engineering and computer science (EECS) directly related to Semiconductor field.
• Minimum of 6 months of experience in one or more of the following:
  Semiconductor materials, fabrication, and device physics.
  Electrical characterization of Semiconductor Devices (transistor, diode, etc.)

Preferred Qualifications

• Advanced Transistor Device Structures and Device Physics.
• Process monitoring Test structures design and layout experience.
• Device and circuit simulation.
• Statistical Process Control (SPC) or Design of Experiments (DOE) principles and engineering analysis tools.
• Expertise in database structures, research methods analytics packages (i.e., JMP, MATLAB, Octave), scripting languages (i.e., JSL, Perl, TCL), or programming languages (i.e., Python, SQL, C/C++)
  Expertise in agentic AI and orchestrated LLM workflows, machine learning, deep learning, Retrieval-Augmented Generation (RAG), knowledge engineering, and dataflow pipeline architectures.

Work model

• Onsite at Taipei Intel office, Taiwan

          

Job Type:
Experienced Hire

Shift:
Shift 1 (Taiwan)

Primary Location:
Taiwan, Taipei

Additional Locations:

Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.