Job Details:

Job Description:
As a CPU HVM Functional-Test Verification Engineer, you will be part of the DFT team focusing on validating DFT for manufacturing functional testing and delivering functional test content for the manufacturing of Intel’s next generation CPU IP designs. Besides being part of DFT verification team, you will also have the opportunity to work in close partnership with CPU design/architecture, SOC design and manufacturing teams.

Job scopes for this position are as follow:

• Validates DFT for manufacturing functional testing
• Develops functional tests to qualify manufacturing goals of next generation Intel CPU IP designs
• Uses fault-simulator to measure coverage effectiveness of functional tests / understand and patch test gaps accordingly before high volume manufacturing
• Engages in post-silicon activities pertaining to customer or DPM issues (as required) by reproducing defect related failures at system or tester, understand the root-cause of failure and create customized test accordingly to close HVM functional test gap
• Replicates, root causes, and debugs test or design issues in pre-silicon environment.
• Finds and implements corrective measures to resolve failing tests in both pre-silicon and post-silicon environments

Qualifications:
Minimum Qualifications :

• Bachelor’s / Master’s degree / PhD in Electronics Engineering, Computer Engineering, or a related field.
• At least 10 years of working experience in semiconductor design domains such as IP/SOC design, IP/SOC design verification, post-silicon.
• Proven expertise in JTAG TAP (Test Access Port)
• Strong scripting and programming skills, particularly Python, Perl and C/C++.
• Robust understanding of general CPU architecture and strong comprehension of microarchitecture fundamentals.
• Proficiency in System Verilog and UVM, and with experience debugging on any micro-architecture issue in pre-silicon environment
• Strong problem-solving and analytical skills with a creative approach to debugging and resolving issues.
• Effective communication and collaboration skills to work cohesively in a dynamic, fast-paced environment.
• Self-motivated individual with a passion for innovation and continuous learning.

Added advantage for candidates with following qualifications:

• Prior knowledge in ASIC design verification particularly on x86 CPU
• Prior knowledge/background in post-silicon validation/debug at system or tester domain
• Prior experience with using fault-simulator
• Has solid understanding on semiconductor manufacturing process flow

          

Job Type:
Experienced Hire

Shift:
Shift 1 (Malaysia)

Primary Location:
Malaysia, Penang

Additional Locations:

Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Job Details:

Job Description:
As a CPU HVM Functional-Test Verification Engineer, you will be part of the DFT team focusing on validating DFT for manufacturing functional testing and delivering functional test content for the manufacturing of Intel’s next generation CPU IP designs. Besides being part of DFT verification team, you will also have the opportunity to work in close partnership with CPU design/architecture, SOC design and manufacturing teams.

Job scopes for this position are as follow:

• Validates DFT for manufacturing functional testing
• Develops functional tests to qualify manufacturing goals of next generation Intel CPU IP designs
• Uses fault-simulator to measure coverage effectiveness of functional tests / understand and patch test gaps accordingly before high volume manufacturing
• Engages in post-silicon activities pertaining to customer or DPM issues (as required) by reproducing defect related failures at system or tester, understand the root-cause of failure and create customized test accordingly to close HVM functional test gap
• Replicates, root causes, and debugs test or design issues in pre-silicon environment.
• Finds and implements corrective measures to resolve failing tests in both pre-silicon and post-silicon environments

Qualifications:
Minimum Qualifications :

• Bachelor’s / Master’s degree / PhD in Electronics Engineering, Computer Engineering, or a related field.
• At least 10 years of working experience in semiconductor design domains such as IP/SOC design, IP/SOC design verification, post-silicon.
• Proven expertise in JTAG TAP (Test Access Port)
• Strong scripting and programming skills, particularly Python, Perl and C/C++.
• Robust understanding of general CPU architecture and strong comprehension of microarchitecture fundamentals.
• Proficiency in System Verilog and UVM, and with experience debugging on any micro-architecture issue in pre-silicon environment
• Strong problem-solving and analytical skills with a creative approach to debugging and resolving issues.
• Effective communication and collaboration skills to work cohesively in a dynamic, fast-paced environment.
• Self-motivated individual with a passion for innovation and continuous learning.

Added advantage for candidates with following qualifications:

• Prior knowledge in ASIC design verification particularly on x86 CPU
• Prior knowledge/background in post-silicon validation/debug at system or tester domain
• Prior experience with using fault-simulator
• Has solid understanding on semiconductor manufacturing process flow

          

Job Type:
Experienced Hire

Shift:
Shift 1 (Malaysia)

Primary Location:
Malaysia, Penang

Additional Locations:

Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.